In large, fully populated 1D and 2D transducer arrays, providing connection to each array element is a challenge. In the case of 2D CMUT arrays, researchers have reported on interconnect techniques both based on through-wafer vias and through wafer trench isolation. In the through-wafer via implementation, a conductive material, usually doped polysilicon, is used to fill the vias and serves as the conductor between the front and back sides of the array elements. It was found that after the deposition of the polysilicon, performing wafer-to-wafer fusion bonding is difficult. Therefore, the through-wafer via approach is limited to only surface micromachining CMUT processes.
It has further been reported that in the trench isolation process, a carrier wafer is required during the deep reactive ion etching (DRIE) and the flip-chip bonding steps to provide the mechanical support for the membranes. This particular requirement presents certain drawbacks in processing. Good adhesion between the carrier wafer and the membrane surface is required for adequate mechanical support for the membranes. However, it is difficult to separate the carrier wafer and the membrane after the flip-chip bonding. The adhesive material may also swell in the solvent, creating stress that can break the CMUT membranes. It is highly desirable to eliminate the need of the carrier wafer for the trench isolation process.